1. Field
This disclosure relates generally to field effect transistor (FET) devices, and more specifically, to high voltage TMOS FET devices with a low gate charge structure and a method of making the same.
2. Related Art
Field effect transistors (FETS) are widely used today. A common variety are often referred to as metal-oxide-semiconductor (MOS) devices even though the “metal” may be made of other things than simple metals and the “oxide” may also be of other things than simple oxides. Accordingly, as used herein the terms “metal” and “oxide” are intended to include any convenient and stable conductive and insulating materials, respectively. A particular variety of MOS devices useful for power applications are TMOS devices, so called because the current pathway follows a “T” shape.
While conventional TMOS devices are very useful, they suffer from a number of limitations well known in the art. For example, the on-resistance RDS(ON) is often higher than desired, the gate-source and gate-drain capacitances CGS and CGD are often larger than desired, the gate charge QG can be larger than desired, and other device properties may also be less than optimum. While various improvements have been made in the past to attempt to ameliorate these problems, it has often been the case that what is done to improve one characteristic results in degradation of another important characteristic. For example, the device on resistance RDS(ON) can be improved by increasing a doping level within a JFET region or by increasing a length dimension of the gate; however, this tends to undesirably increase the Miller capacitance CGD and/or the gate charge QG, and/or undesirably reduce the break-down voltage BVDSS of the device. Conversely, CGD and QG can be reduced, and/or BVDSS can be increased by thickening the gate oxide above the JFET region or decreasing the gate length; however, this tends to increase the device on resistance RDS(ON) and/or undesirably perturb the threshold voltage of the device. These and other factors combine to limit the device's ability to switch large amounts of power at high frequencies.
A figure of merit (FOM)=RDSON*QG can be defined at a predetermined threshold voltage that is useful in predicting the capabilities of TMOS power devices for high frequency, high power applications. Present day TMOS power devices have FOM values in the range of about 90 to 120 (milli-Ohms)*(nano-Coulombs) at, for example, a gate to source voltage of VGS=4.5 volts. In order to be able to efficiently switch significant amounts of power (e.g., 20-200 amps) at frequencies in the range of about 10E5 to 10E6 cycles per second (cps) or higher, smaller values of FOM are important. Thus, there is an ongoing need for TMOS devices whose figure of merit is more suited to high-frequency, high-power applications. Accordingly, there is a need for TMOS devices having these and other desirable features. Furthermore, it is desirable to provide an improved device structure and method that provide TMOS devices of the desired properties, especially devices with figures of merit equal or less than about 80 (milli-Ohms)*(nano-Coulombs). In addition, it is desirable that changes in device structure and method of fabrication used to improve the devices be compatible with existing device manufacturing techniques.
Additional desirable features and characteristics of the embodiments of the present disclosure will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.